Intel has recently accepted ASML's first new generation high NAEUV lithography machine, but TSMC has remained unmoved and may not follow up until the 1nm process era.Intel plans to use high NAEUV lithography machines for process nodes after Intel18A, which is beyond 1.8nm, probably in 2026-2027.
On the roadmap previously announced by Intel, three new process nodes have been arranged after 18A, but they have not yet been specifically named.
Kissinger revealed that one of them is equivalent to a 1.5nm process, expected to be named 15A, and will be mass-produced in a German factory.
TSMC has been tight-lipped about its plans to introduce high-NAEUV lithography machines. Multiple sources said that TSMC is still waiting and evaluating. It currently plans to wait until the 1nm process node to launch, and the time will not be until around 2030.
TSMC is currently sprinting towards the 2nm process, which is expected to be mass-produced between 2025 and 2027. A single chip can integrate more than 100 billion transistors, and a single package can exceed 500 billion.
Then there are 1.4nm and 1nm, the latter of which is planned to be mass-produced around 2030. It will integrate more than 200 billion transistors in a single chip and more than 1 trillion in a single package, which is double that of the N2 process.
Interestingly, Intel also plans to package 1 trillion transistors in a single package by 2030, which is tit for tat.