At the Embedded World Conference in Nuremberg, Germany, AMD officially announced the launch of the fifth-generation AMDEPYC embedded processor, expanding its x86 embedded processor product portfolio.According to reports, AMDEPYC Embedded 9005 series processors are specially designed to support computing-intensive embedded systems. There are currently 17 SKUs.The number of cores ranges from 8 cores to 192 cores, improving data processing throughput for network and storage workloads by up to 1.3 times and 1.6 times.
Using SP5 slot, it is compatible with the previous generation AMDEPYC embedded 9004 series, making updates and upgrades easier. The maximum L3 cache is 512MB, the maximum number of PCIe5.0 channels is 160, and the memory bandwidth of 12 DDR5 memory channels is up to 614GB/s.
AMDEPYC Embedded 9005 series CPUs will provide extended 7-year product manufacturing support, reducing redesign and certification work.AMD also plans to extend the design operating life target of the series from 5 years for current prototypes to 7 years for production models.
This series of CPUs is equipped with NTB (Non-Transparent Bridging) technology, which enables high-performance data transfer across different memory domains between two processor packages.
It also has a DRAMflush function. After detecting a power outage, the processor will immediately dump the memory to NVMe storage before shutting down. When restarting, the BIOS will copy the memory dump from the NVMeSSD back to the memory.
This series of processors supports dual SPI flash memory interfaces. In addition to the main SPI flash memory that stores the system BIOS, system architects can also embed a lightweight operating system directly on the 64MB SPI flash ROM.
AMDEPYC Embedded 9005 series processors are currently providing samples to early trial customers, and mass production and shipment are expected to begin in the second quarter of 2025.