NEO Semiconductor recently announced the launch of two new 3D X-DRAM unit designs - 1T1C and 3T0C, which are expected to completely change the status quo of DRAM memory.These two designs use single-transistor single-capacitance and three-transistor zero-capacitance architectures respectively. Proof-of-concept test chips are expected to be produced in 2026 and will provide 10 times the capacity of current ordinary DRAM modules.
Based on NEO's 3D X-DRAM technology, the newly designed memory unit is able to accommodate 512Gb (64GB) of capacity on a single module, which is at least 10 times more than any module currently on the market.
In NEO's test simulations, these units achieved read and write speeds of 10 nanoseconds and a retention time of over 9 minutes, both of which are at the forefront of current DRAM capabilities.
The new design uses indium gallium zinc oxide (IGZO)-based materials, and the 1T1C and 3T0C cells can be built like 3D NAND, using a stacked design to increase capacity and throughput while maintaining energy efficiency.
Andy Hsu, CEO of NEO Semiconductor said:"With the introduction of 1T1C and 3T0C 3D X-DRAM, we are redefining what is possible in memory technology. This innovation breaks through the scaling limitations of today's DRAM, making NEO a leader in next-generation memory."
NEO Semiconductor plans to share more information about 1T1C, 3T0C and other 3D X-DRAM and 3D NAND series products at this month’s IEEE International Memory Symposium.