At the 2025 IEEE International Electronic Devices Conference (IEDM 2025), Intel Foundry demonstrated a key technological breakthrough for system-level chip design in the AI era - the next generation of embedded decoupling capacitors. This innovation is expected to solve the power supply bottleneck faced in the continuous shrinkage of transistors and provide a more stable and efficient power solution for AI and high-performance chips.
Capacitor material innovation
Researchers at Intel Foundry demonstrate three new metal-insulator-metal (MIM) capacitor materials for deep trench structures:
(1) Ferroelectric Hafnium Zirconium Oxide (HfZrO): Utilizes the spontaneous polarization characteristics of ferroelectric materials to achieve high dielectric constant at the nanoscale;
(2) Titanium dioxide (TiO₂): has excellent dielectric properties and thermal stability;
(3) Strontium titanate (SrTiO₃): A perovskite structure material that exhibits excellent capacitance density in deep trenches.
These materials enable uniform and controllable film growth in deep trench structures via atomic layer deposition (ALD), significantly improving interface quality and increasing device reliability.
Breakthrough Performance Metrics
This technology has achieved a cross-generational leap, which is reflected in:
(2) Capacitance density: reaching 60-98 fF/μm², a significant improvement compared to current advanced technology;
(2) Leakage performance: The leakage level is 1,000 times lower than the industry target, significantly reducing static power consumption;
(3) Reliability: Does not affect indicators such as capacitance drift and breakdown voltage.
System-Level Advantages
This technological breakthrough will bring multiple advantages to AI chip design, including improved power integrity and effective suppression of power supply noise and voltage fluctuations. In terms of thermal management collaborative optimization, electric and thermal collaborative optimization is achieved to provide a more stable working environment for high-power AI chips. It also helps achieve higher capacitance density within a limited chip area, freeing up more space for functional module integration and achieving chip area optimization.
In the next generation of advanced CMOS processes, a series of stable, low-leakage MIM capacitance density enhancement technologies have considerable application potential. Intel Foundry will be committed to continuous innovation and provide key power management solutions for high-performance computing chips in the AI era.