Among Qualcomm's first batch of 3nm platform Snapdragon X2 Elite series launched for the laptop market, the flagship X2 Elite Extreme was revealed to not use the common N3E or N3P process. Instead, it turned to TSMC's 3nm N3X process that targets extreme performance, hoping to squeeze out single-core and multi-core performance under high voltage and high frequency to support its high-performance configuration of up to 5.00GHz and up to 18 cores.

Technical dismantling from Moor Insights & Strategy shows that Snapdragon X2 Elite Extreme uses a SiP packaging solution similar to Apple's "unified memory", which packages RAM, storage and other components into the same module with the SoC. Through a 192-bit memory bus, a 128GB memory limit and a maximum memory frequency of 9523 MT/s, the bandwidth is increased to 228GB/s. Although this number exceeds the Apple M5, it is still lower than the M4 Pro by about 273GB/s level. The number of integrated transistors in the entire chip is about 31 billion. Compared with N3P, N3X can bring about an additional 5% performance increase in high-performance computing scenarios, but the price is relatively disadvantaged in transistor density and energy efficiency. Qualcomm also designed the X2 Elite Extreme to run at an operating voltage exceeding 1.0V in exchange for a higher frequency space.

In terms of actual power consumption settings, this chip can break through the 100W threshold when unlocking the power consumption limit. In some laptop bodies with better heat dissipation conditions, it can maintain the 40W level for a long time to support sustained performance output under high loads. However, the currently public Cinebench 2024 single-core and multi-core test results show that under the same conditions, the X2 Elite Extreme still lags behind the Apple M4 Max; on the GPU side, facing the M4 Pro's lead of up to about 45% in synthetic benchmarks such as 3DMark Steel Nomad Light Unlimited and 3DMark Solar Bay Unlimited, Qualcomm's new flagship is also at a disadvantage, making the industry's response to the N3X It raises questions about whether the "extreme performance bonus" it brings is worth the money.

From the perspective of node strategy, Qualcomm's choice of N3X means that for the first time, a commercial large-scale chip deviates from TSMC's current mainstream N3P route, giving priority to high frequency and peak performance rather than optimal solutions for area and energy efficiency. The report believes that, at least judging from the current limited public benchmark tests, this choice has not yet achieved the expected "crushing" lead. Whether Qualcomm's extreme performance route can exert its advantages in a wider range of practical applications and complete machine design will require more subsequent models and actual measurement data to provide the answer.