According to Korean media reports, Samsung Semiconductor is advancing a new 2-nanometer process project for high-bandwidth memory (HBM) and plans to develop customized HBM logic chips for different customer needs. The report quoted industry insiders as saying that although the specific customer list has not yet been disclosed, Samsung's HBM development team has begun pre-research for the next generation of products using "advanced to 2 nanometer" wafer foundry processes to lay the foundation for future generations of HBM solutions.
It is unclear whether the plan will ultimately use 2nm nodes such as SF2 or SF2P in Samsung’s own foundry system.
Existing information shows that Samsung’s sixth-generation HBM product line (HBM4) is expected to be based on the 4-nanometer process, which is widely speculated to come from the SF4 family node. An unnamed company insider revealed that Samsung Electronics is designing custom logic chips for HBM under the leadership of the custom SoC team newly established last year under the System LSI Business Unit and building a process portfolio covering 4 nanometers to 2 nanometers to respond to the diverse needs of different customers.
Industry analysts believe that future-oriented ultra-high-performance AI accelerators will be highly dependent on HBM modules with more cutting-edge performance and bandwidth. With the actual implementation of 2-nanometer logic chips, the enterprise-level AI market is expected to see "strong" demand growth, which is likely to wait until after the seventh-generation product HBM4E, that is, after 2027.