Intel is about to take an important step in the data center field. The protagonist this time is not a GPU or an accelerator card, but a server CPU integrating nearly 300 energy-efficient cores.The company this week released the Xeon 6+ processor family, code-named Clearwater Forest, using the new Intel 18A process technology, which is Intel's most advanced manufacturing technology to date and the first products to enter the 1.8 nanometer level. The new platform marks Intel’s strategic shift in cloud computing and carrier-grade loads—from pursuing extreme clock speeds to prioritizing energy efficiency and system-level integration capabilities.
Clearwater Forest is based on Intel's new Darkmont microarchitecture. Each processor integrates up to 288 efficiency cores, distributed on 12 computing tiles, achieving unprecedented core density in the server CPU field. Each computing chiplet contains 24 Darkmont cores, manufactured on the 18A process and interconnected via Intel's Foveros Direct 3D stacking technology. The processor also contains two input/output chiplets based on the Intel 7 process to handle memory, PCIe and network interfaces, and is equipped with three base chiplets manufactured using the Intel 3 process to "fix" the entire multi-chip package structure together. Chiplets communicate with each other through Intel's Embedded Multi-die Interconnect Bridge (EMIB) technology, a packaging solution that has also been used in the company's high-end GPU products.
The core goal of this complex package design is to keep data as close to the computing core as possible while reducing power consumption as much as possible. Therefore, Clearwater Forest completely restructured the cache system: each four Darkmont cores share a 4 MB second-level cache, and the total capacity of the entire chip's last-level cache exceeds 1 GB, which is approximately 1,152 MB, allowing hundreds of cores to access hotspot data more efficiently and reduce dependence on external memory bandwidth.
As a new generation of efficiency core architecture, Darkmont itself has also been significantly upgraded. Each core is equipped with a 64 KB instruction cache, the fetch and decode paths are further widened, the number of parallel operations tracked by the out-of-order execution engine is increased, and the performance of scalar and vector operations is improved by adding execution ports.
Although the Xeon 6+ family focuses on energy efficiency, it also integrates a variety of hardware acceleration capabilities that are increasingly valued by data center operators. Each processor supports Intel AMX (Advanced Matrix Extensions) to accelerate matrix calculations, integrates QAT (QuickAssist Technology) for cryptography and compression loads, and is equipped with a vRAN Boost acceleration module for virtualized radio access networks. These integrated accelerators are targeted at tasks that have traditionally required standalone AI cards or network accelerator cards, especially edge and telecom deployments in 5G Advanced and future 6G scenarios. Intel's argument is that embedding these capabilities into the CPU prevents operators from drastically revamping rack architecture while continuing to expand AI inference and network processing capabilities on existing platforms.
At the platform level, Clearwater Forest remains compatible with current Xeon sockets, helping system manufacturers to deploy smoothly. The new platform offers 12-channel DDR5 memory at frequencies up to 8000 MT/s and supports up to 96 PCIe 5.0 lanes, 64 of which are available for CXL 2.0 for consistent memory or device expansion. In a dual-socket configuration, up to 576 Darkmont cores can be run simultaneously in a single server, significantly expanding computing density.
Clearwater Forest reflects a broader shift in Intel's data center roadmap: from monolithic large chips to small chip splits and heterogeneous packaging, and from pure stacking for peak performance to integrated accelerators for load-specific optimization. For cloud service providers and telecom operators, under the premise that every watt of power consumption and every rack unit is extremely sensitive, this tilt towards high energy efficiency and high integration is no longer just a design philosophy, but a rigid requirement at the operational level.
Intel expects that systems equipped with Xeon 6+ processors will begin shipping later this year, when the new generation of 18A nodes will also be officially put into commercial use in the data center field.