The global semiconductor market is expected to exceed $1.5 trillion by 2030, TSMC said in presentation materials released ahead of a technology seminar on Thursday, up from its previous forecast of $1 trillion.
TSMC expects artificial intelligence and high-performance computing to account for 55% of the $1.5 trillion market, followed by smartphones (20%) and automotive applications (10%).
TSMC said it has accelerated its capacity expansion in 2025 and 2026 and plans to build a ninth-phase wafer fab and advanced packaging facilities in 2026.
TSMC is expected to significantly increase production capacity of its most advanced 2nm chips and next-generation A16 chips, with a compound annual growth rate (CAGR) of 70% from 2026 to 2028.
TSMC said that the compound annual growth rate of its advanced packaging technology CoWoS (chips packaged on wafer substrates) is expected to exceed 80% between 2022 and 2027. CoWoS is a key chip packaging technology widely used in artificial intelligence chips including Nvidia (ticker: NVDA.O).
The company said it expects demand for AI accelerator wafers to grow 11-fold between 2022 and 2026.
TSMC said its first wafer fab in Arizona, US, has started production. The equipment relocation of the second wafer fab is planned for the second half of 2026. Construction of the third fab is underway. Construction of the fourth wafer fab and the plant's first advanced packaging facility is expected to begin this year.
The first fab in Japan has now begun mass production of 22nm and 28nm products. Due to strong market demand, plans for the second fab have been upgraded to the 3nm process.
The German wafer fab is currently under construction and is progressing as planned. The plan is to offer 28nm and 22nm processes first, with 16nm and 12nm processes to follow.