AMD announced the launch of the Versal Premium Gen 2 MoP adaptive system-on-chip (SoC). This is the company's first Versal product using a packaged memory architecture. It integrates up to 32GB of LPDDR5X memory in a single package and has a maximum bandwidth of 288GB/s. Compared with traditional onboard or discrete LPDDR5X solutions, it achieves a new balance between size and performance.
This design change, driven by the continued tight supply and high prices of HBM high-bandwidth memory, is seen as a key move to meet the needs of the data center and AI markets. It also means that in high-bandwidth scenarios, LPDDR5X packaged memory is becoming a realistic option to replace HBM.
According to AMD, Versal Gen 2 MoP integrates up to four LPDDR5X chips in the package to achieve a maximum capacity of 32GB, a maximum speed of 9000MT/s, and a maximum bandwidth of 288GB/s. Compared with discrete LPDDR5X designs, it can reduce the board area by more than 60%, while bringing up to 10 times more computing power, and supporting a product life cycle of more than 15 years. The more compact package and board design facilitates the deployment of high-bandwidth systems in forms such as Enterprise and Data Center Standard Form Factor (EDSFF) and 3U VPX that were previously difficult to implement due to external high-speed memory cabling, space and heat dissipation issues. It also facilitates applications in restricted environments such as telecommunications and aerospace.
Versal Premium Gen 2 MoP adopts an adaptive SoC design based on Arm architecture and integrates CXL 3.1 and PCIe 6.0 hard-core IP in the chip. It has a single link rate of up to 64Gb/s and can be paired with AMD EPYC processors to provide high-speed data paths for data-intensive applications. In terms of memory resources, the MoP design supports LPDDR5X memory up to 9000Mb/s, while achieving flexible memory expansion through the CXL memory pool and expansion modules, providing sufficient data supply capabilities for high-bandwidth workloads such as AI inference, video processing, and network security.
In terms of specific resource configuration, the currently announced Versal Premium Gen 2 MoP devices include models such as 2VP3422, 2VP3522 and 2VP3622. The system logic unit can reach up to 3.273 million, the integrated LPDDR5X capacity is unified to 32GB, equipped with eight x32-bit controllers, and provides up to thousands of DSP engines and two PCIe 6.0 x8 interfaces and supports CXL 3.1. These devices also feature up to 194 XP5IO and 78 MIO lanes, and up to 72 GTM2 high-speed transceivers, targeting complex system designs requiring high bandwidth, high I/O density and powerful programmable logic.
Designed for long life cycles and harsh environments, Versal Premium Gen 2 MoP supports an industrial-grade operating temperature range from -40°C to 110°C, making it suitable for long-term online, mission-critical scenarios that seek a balance between reliability and performance. With LPDDR5X packaged memory and more than 15 years of life cycle support, AMD is trying to decouple the product supply rhythm from the data center-driven HBM update cycle, reducing the risk of being forced to revise due to memory discontinuation or limited supply. This is particularly important for industries such as industrial control, communications, and defense.
In terms of security capabilities, Versal Premium Gen 2 MoP introduces the link layer integrity and data encryption (IDE) features of PCIe 6.0 to enhance protection against physical attacks and ensure data security during transmission. Integrated on-chip DDR memory encryption protects data at rest without tying up programmable logic resources, while a hard-core 400G high-speed encryption engine powers high-bandwidth security processing to enhance overall security without sacrificing throughput.
At the development and delivery level, Versal Premium Gen 2 MoP provides a pre-verified packaged LPDDR5X interface, which eliminates the complex work of high-speed memory wiring on the circuit board and helps reduce board-level simulation and verification, thus shortening the project development cycle, reducing design risks and reducing expensive multiple board changes. AMD said that this packaged memory architecture is designed to help system architects continue to increase bandwidth and computing power under limited space and strict thermal design conditions, and accelerate the mass production of high-bandwidth systems.
According to official plans, the Versal Premium Gen 2 MoP device is expected to begin sampling at the end of 2026 and enter mass production in the second half of next year. Against the background that HBM continues to be in short supply and prices remain high, AMD has introduced the packaged LPDDR5X solution on Versal Gen 2, trying to provide a compromise option for the high-bandwidth computing market that takes into account performance, cost and supply stability, and also provides a model for more standard SoCs to adopt packaged memory architecture in the future.