Abstract:
Arm officially launched the new generation Neoverse CSS N4 "Ranger" computing subsystem platform to further strengthen its presence in the cloud computing and artificial intelligence infrastructure markets. As an important part of Arm's semi-custom chip strategy, Neoverse CSS N4 is built based on TSMC's N3P process. A single chip can integrate up to 128 Neoverse N4 cores, making it one of the most flexible and largest computing subsystems in the Arm Neoverse family.
The full name of CSS in Neoverse CSS is Compute Subsystem, which is a semi-customized solution launched by Arm for large cloud service providers and chip design companies. Customers can freely configure the number of cores, cache capacity, memory systems, I/O interfaces and chip interconnect structures on the basic IP framework provided by Arm, thereby quickly creating customized processors that meet their own needs. In the past few years, the platform has been used by Microsoft Azure, Google Cloud and other companies for server processor development, and has also been widely used in Nvidia and Intel's data processing unit (DPU) products.
According to information released by Arm, Neoverse CSS N4 supports flexible configurations from 8 cores to 128 cores, with a maximum frequency of up to 3.8GHz. Although Arm did not disclose the specific frequency performance under different core sizes, it is generally believed that as the number of cores increases, the actual operating frequency may be reduced accordingly.
In terms of system expansion capabilities, the platform not only supports a single-chip 128-core configuration, but can also further expand the scale through multi-core and multi-slot solutions. The platform supports the UCIe core-to-chip interconnect standard and allows partners to use customized interconnect technology to build larger-scale computing systems to meet the needs of future ultra-large-scale data centers and artificial intelligence infrastructure.
The cache and memory subsystems have also been significantly enhanced compared to the previous generation. A single Neoverse CSS N4 chip supports up to 256MB of Level 3 cache, and each core can be equipped with up to 2MB of Level 2 cache. It also has a built-in 64KB Level 1 instruction cache and 64KB Level 1 data cache. In terms of memory, it not only supports DDR5, but also introduces LPDDR6 support for the first time to meet the power consumption and bandwidth requirements of different application scenarios.
I/O capabilities have also been significantly improved. The new platform supports up to 128 PCIe 7.0 or PCIe 6.0 lanes and is compatible with the CXL 4.0 standard, providing greater expansion space for high-performance storage devices, AI accelerators and high-speed network interfaces.
Compared with the previous generation Neoverse CSS N2, the new platform has been almost fully upgraded. The previous generation product supports up to 64 cores, 1MB L2 cache per core and 64MB L3 cache, and only supports 64 PCIe 5.0 and CXL lanes. In comparison, Neoverse CSS N4 has achieved significant improvements in core number, cache size, I/O bandwidth and memory support.
Arm stated that under the configuration of 128 cores, 3GHz operating frequency and 2MB L2 cache per core, the single-socket performance of Neoverse CSS N4 can reach twice that of the Neoverse N3 platform, with performance per watt increased by approximately 25% and memory bandwidth increased by approximately 75%. These improvements are mainly aimed at the data center needs in the artificial intelligence era, especially in scenarios such as large-scale inference, KV Cache management, network processing, and accelerator orchestration, which can provide higher computing density and throughput capabilities.
Arm also emphasized that the core positioning of the Neoverse N series is different from that of the V series. The N series mainly targets energy efficiency and high-density deployment, while the V series pursues ultimate performance. Currently, NVIDIA's previous generation Grace processor uses the Neoverse V2 core, and AWS's Graviton series and Google Cloud's Axion project also heavily use the Neoverse architecture. In contrast, the N series is more used for control plane tasks, network processing, and power-sensitive computing scenarios.
In addition to releasing Neoverse CSS N4, Arm also announced the latest progress of its AGI CPU project. This product is built on the Neoverse V3 architecture and has received deployment support from enterprises including Oracle, ByteDance, Meta, OpenAI, Cloudflare and SAP. Arm hopes to form a dual-route layout through AGI CPU and Neoverse CSS N4. On the one hand, it will provide customers with a highly customized chip development platform, and on the other hand, it will launch a reference-level server processor solution for the artificial intelligence era.
As generative AI and agent applications continue to drive data center upgrades, more and more cloud service providers are seeking customized chips optimized for specific workloads. Arm’s launch of Neoverse CSS N4 is seen as an important step in further expanding its data center market share. With a maximum 128-core scale, LPDDR6 support, PCIe 7.0 connectivity, and advanced 3-nanometer manufacturing process, the platform is expected to become one of the important infrastructures for AI infrastructure and cloud computing processors in the next few years.
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