Abstract:
Synaptics released the Astra SR200 series of multi-modal edge AI processors, calling this type of product "xMCU": adding stronger AI computing, image and audio processing capabilities, and high-capacity on-chip packaged memory to the low-power architecture of the microcontroller. The series is targeted at smart glasses, wearable devices, smart cameras, battery-powered sensors, industrial vision and voice systems, allowing devices to process vision, voice and sensor data locally, reducing reliance on external processors and cloud inference.

SR200 is divided into three pin-compatible models, using Arm Cortex-M85 and Cortex-M52 dual-core combination, with AI computing power of 200, 300 and 400 GOPS respectively. The M85 of SR210 has a maximum speed of 400MHz, and the M52 has a maximum speed of 100MHz, targeting always-on voice and perception; SR230 has been increased to 600MHz and 150MHz respectively, and added visual, display and optional audio processing; SR250 has a maximum speed of 800MHz and 200MHz, targeting more complex multi-modal applications such as dual vision and dual display. The three chips can share the hardware board-level design, and manufacturers can adjust the computing power between different product grades.

The chip is equipped with the Synaptics Torq AI engine and integrates Google Research’s second-generation Coral NPU architecture. Coral NPU adopts an open RISC-V design and is equipped with the MLIR/IREE open source compilation tool chain, which can process models such as CNN and Transformer. It is an open edge AI processor architecture and does not directly install Google's original Edge TPU into the chip. The Coral architecture design goal announced by Google can be expanded to 1 TOPS, but the actual nominal maximum of the SR200 series is 400 GOPS, which is 0.4 TOPS.
In terms of memory, the SR200 integrates up to 8MB of SRAM and custom high-bandwidth DRAM that can be expanded to hundreds of MB in a package, reducing the need for external memory chips and high-speed wiring. Synaptics claims that this memory architecture consumes about one-third of the power of typical system DRAM to run relevant workloads. The chip is also equipped with a 2.5D graphics processor, image processing pipeline and display interface; the industrial version provides Gigabit Ethernet, TSN and dual CAN-FD interfaces. In terms of security, the platform adopts hardware isolation, encryption acceleration and secure boot design, aiming to comply with PSA Level 3 and CC EAL4+ certification requirements.
Synaptics and Google also launched the Coralboard SR development board based on SR250, equipped with up to 400 GOPS NPU, up to 8MB SRAM and up to 256MB custom DRAM, and supports multiple cameras, displays, digital microphones and Wi-Fi and Bluetooth expansion. The company also announced that the Coralboard SL development board has been sold globally through DigiKey; the SR200 chip series has been officially released, but the official announcement did not provide the end product price or the launch time of consumer devices equipped with the chip.
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