The National Aeronautics and Space Administration (NASA) is developing a new high-performance radiation-hardened computer chip that is expected to completely change the way future deep space probes operate. This processor was jointly built by NASA and commercial partners to enable spacecraft to process data at high speeds in environments far away from the earth and achieve autonomous decision-making to a certain extent.
This project is part of NASA's "High Performance Spaceflight Computing" program, which aims to significantly improve the onboard computing capabilities of spacecraft used for exploration missions. Most of the spacecraft currently in service rely on older but highly reliable platform-level processors that are capable of operating in harsh space environments for a long time. However, the performance of these chips has been difficult to meet the needs of the next generation of deep space missions. NASA points out that more advanced processors are a key foundation for achieving a high degree of spacecraft autonomy, accelerating onboard scientific data analysis, and supporting future manned missions to the moon and beyond.
NASA said that this new generation of multi-core system further achieves fault tolerance, flexibility and high performance while continuing the reliability of previous space-level processors. The relevant person in charge emphasized that advancing space flight computing technology is not only an engineering breakthrough, but also the result of in-depth collaboration between NASA and the industry.
The core of the project is a radiation-resistant processor specially reinforced for the space environment. Its goal is to withstand harsh space conditions while providing up to 100 times the computing power compared to current space flight computers. To verify its reliability, the NASA Jet Propulsion Laboratory (JPL) engineering team in California, USA, is conducting high-intensity tests on the chip, simulating environments such as deep space radiation, extreme temperature differences, and violent shocks.
According to the requirements of space applications, this type of processor must withstand high-energy particle radiation, severe mechanical shock, and large temperature changes. These factors may damage precision electronic components. High-energy particles from the sun and deep space can also cause calculation errors, forcing the spacecraft to enter "safe mode," shutting down non-critical systems while ground engineers troubleshoot the problem. To this end, NASA also specifically examined the chip's performance in complex star landing environments.
During the testing process, the engineering team used high-precision landing scene data from real missions to conduct a "practical" test of the chip. Such scenarios usually require high-power hardware to process massive amounts of landing sensor data in real time. Project leaders say it's an exciting time to be involved in the development of this type of hardware because it will provide the computing foundation for NASA's "next giant leap." Testing of the processor at JPL began in February and is expected to last several months, with preliminary results showing that the chip is performing as expected, with roughly 500 times the performance of radiation-hardened processors currently used on spacecraft.
At the start of testing, the team marked the occasion with an email with the subject line "Hello Universe," a nod to the classic "hello world" tradition from the early computing era.
The processor was developed by JPL in partnership with Chandler, Arizona-based Microchip Technology Inc. Early versions of the chip have been distributed to defense and commercial aerospace partners for early application verification and evaluation.
NASA said that related technologies are expected to allow future autonomous spacecraft to use onboard artificial intelligence to respond to emergencies in real time in environments far away from the earth and with large communication delays, and to make decisions independently when humans are unable to intervene quickly. In addition, this processor will help deep space missions complete the rapid analysis, storage and return of scientific data more efficiently, and provide powerful onboard computing support for future manned missions such as the moon and Mars.
From an architectural point of view, this is a "System-on-a-Chip" (SoC), which integrates the core components of a computer onto a chip that can be placed in the palm of your hand. It integrates a central processing unit, a dedicated computing acceleration unit, an advanced network system, memory and various input/output interfaces. SoCs are already very common in smartphones and tablet devices and are widely used in consumer electronics due to their small size and high energy efficiency. The difference is that the chip JPL is testing is specifically designed for long-duration missions in deep space and can operate reliably for years in harsh environments millions or even billions of miles away from any repair crews.
Once the technology is certified for space flight, NASA plans to deploy it on multiple types of missions, including Earth observation satellites, planetary surface exploration vehicles, manned modules, and various types of deep space spacecraft. Microchip Technology also plans to expand the application of this technology to ground industries, such as aviation and automobile manufacturing, to provide these industries with embedded platforms with higher reliability and computing power.
The project is managed by NASA's Langley Research Center and is part of the Space Technology Mission Directorate's Game Changing Development (GCD) program. The GCD program, along with JPL managed by Caltech, is advancing this technology from early mission requirements and industrial research stages all the way to concrete development and delivery. NASA JPL officially selected Microchip Technology as a partner in 2022, and the latter also invested its own R&D resources to promote the design and implementation of the processor.