The capacity and bandwidth of the cache have a decisive impact on the performance of the CPU processor. Both Intel and AMD are pursuing larger and faster caches, especially the third-level cache, but Intel is always far behind. In the server field, the third-level cache of the fourth generation Intel Sapphire Rapids Xeon is only 112.5MB, and the newly released Emerald Rapids fifth generation Xeon has increased to 320MB, but it is obviously not enough.
The latest Intel official information confirms,Intel's upcoming sixth-generation Xeon Granite Rapids will continue to increase the level three cache to 480MB, an increase of 50%, and more than four times that of the fourth-generation Xeon.
Granite Rapids will adopt a traditional all-large-core design and is expected to be released in the second half of this year. Sierra Forest, released in the first half of this year, will use all-small cores for the first time, up to 288 cores and 288 threads. Both are Intel3 manufacturing processes.
But in front of AMD, this is still incomparable. The standard Milan L3 cache of the third generation EPYC is 256MB, and the Milan-X has a 3D cache of up to 768MB.
The fourth generation EPYC's Genoa and Genoa-X have 384MB and 1152MB respectively, with the latter exceeding 1GB for the first time.
The next-generation Turing based on Zen5 architecture will be divided into two versions. The Classic version’s native L3 cache is still 384MB, and the Dense high-density version has been increased to 512MB.