Intel reveals Crescent Island accelerator card: equipped with 32 Xe3P cores and up to 480GB LPDDR5X memory optional

📅 2026-08-25

Abstract:

Intel announced more details of its new generation accelerator card code-named "Crescent Island" at the Hot Chips 2026 conference. This product is aimed at PCs, workstations and data center edge deployment scenarios. It focuses on high-speed artificial intelligence inference. It is built with Xe3P GPU IP and is in the form of a 350W air-cooled PCIe expansion card.

"Crescent Island" is equipped with 32 Xe3P cores, 256 XMX matrix engines, 256 vector engines and 32MB unified L2 cache. Intel's own-brand version will be equipped with 160GB LPDDR5X memory; at the same time, Intel also allows ODM partners to expand the graphics memory capacity to up to 480GB LPDDR5X to meet the demand for local deployment of very large models.

In terms of computing architecture, an important change in Xe3P is the upgrade of the processing pipeline of the XMX engine. Compared with the four-depth pulsation array design used in conventional Xe3, Xe3P upgrades it to a 16-depth processing structure, adds support for FP4 data format, and is also compatible with FP8. Each Xe3P core is also equipped with a 1MB register file and 512KB L1 cache to serve high-throughput AI calculations.

It is worth noting that "Crescent Island" is not a traditional graphics card for graphics rendering or display output. The Xe3P chip eliminates the graphics processing unit used to output images, and the design goal is completely shifted to AI reasoning, including workloads such as long context processing and agent tasks.

Intel said that "Crescent Island" will focus on serving local PC, workstation and edge data center scenarios that require fast AI inference capabilities. Taking running a trillion-parameter model such as Kimi K3 as an example, local deployment requires approximately 2TB of aggregate system memory; if a workstation is equipped with four "Crescent Island" accelerator cards each equipped with 480GB of memory, this capacity requirement can be theoretically achieved.

However, such a high-specification memory configuration is expected to be expensive because of the high price of DRAM itself. Even so, Intel still regards it as a feasible deployment path, saying that the product will support mainstream software frameworks on the first day of release, and relevant software integration work is already in place.

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