Abstract:
Although it was once reported in the market that NVIDIA planned to reduce the HBM configuration of the next-generation Rubin AI accelerator from a 12-layer stack to an 8-layer stack, the latest supply chain news shows that the Rubin series products are expected to still be dominated by 12-layer HBM4 solutions, and the high-bandwidth memory market may face a new round of substantial price increases.
According to industry chain survey results cited by Counterpoint Research, the vast majority of Rubin architecture products will still maintain the originally planned 12-layer stacked HBM4 design. This is different from previous rumors that Nvidia is preparing to move to an 8-layer HBM4 configuration on a large scale.
According to NVIDIA's official technical roadmap, Rubin GPU will be equipped with 12 layers of stacked HBM4 memory. A single GPU has a maximum memory capacity of 288GB and can achieve a memory bandwidth of up to 22TB/s. For current large-scale language model training and inference tasks, memory capacity and bandwidth are still key indicators that determine performance. Therefore, the industry believes that Nvidia has little incentive to compromise on core specifications.
Korean media previously reported that Nvidia asked Samsung Electronics and SK Hynix to increase the supply of 8-layer HBM4 products. The main reasons include manufacturing yield, heat dissipation control and supply chain pressure. Since HBM4 increases the memory interface width to 2048 bits and requires vertical stacking of 12 layers of DRAM chips, its manufacturing complexity is much higher than that of previous generations of products.
However, the latest news points out that these two statements are not necessarily contradictory to each other. Industry insiders believe that Nvidia may use 8-layer HBM4 in some products to alleviate production capacity pressure, but the main Rubin product for the high-end AI market will still retain the 12-layer HBM4 configuration.
At the same time, greater challenges are coming from the supply and demand situation in the HBM market. As artificial intelligence infrastructure continues to expand, HBM has become one of the most scarce resources in the global semiconductor industry.
Market research firm TrendForce predicts that by 2027, the average sales price of high-bandwidth memory products may increase by 121% year-on-year. The main reason driving the price increase is not supply shortage in the traditional sense, but product structure upgrade. As the more expensive HBM4 gradually replaces the HBM3E, and subsequent HBM4E products enter the market, the overall average selling price will rise significantly.
The research institution further pointed out that even if NVIDIA expands the use of 8-layer HBM4, it may not be able to reduce memory costs. Because each HBM stack requires the configuration of expensive basic logic chips (Base Dies), when the number of stacking layers is reduced from 12 to 8, the cost of the same basic chips needs to be spread over fewer storage layers, which may lead to an increase in unit capacity costs.
Data shows that by 2027, the price per Gb capacity of 8-layer HBM products may even be 10% to 20% higher than that of 12-layer HBM. This means that the main benefit from reducing the number of stacking layers may be to improve supply capacity and production efficiency, rather than directly reducing procurement costs.
Analysts believe that as generative artificial intelligence, large model training and AI data center construction enter a new stage, the market demand for high-bandwidth memory is still growing rapidly. For NVIDIA, maintaining the 12-layer HBM4 configuration means higher manufacturing difficulty and procurement costs, but it can ensure that the Rubin platform continues to have industry-leading memory bandwidth and capacity advantages.
With the Rubin platform expected to enter the market in 2027, competition between high-performance AI chips and the HBM supply chain may further intensify, and high-bandwidth memory is becoming one of the key factors affecting the cost of next-generation AI infrastructure.
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