JEDEC, the solid-state technology industry standards organization, announced today that it has officially released the JESD406-5D "LPDDR5/5X Serial Presence Detection (SPD) Content" standard. This is an update based on the previous C version and adds support for calculating recovery time when switching between different working modes. The latest standards are available for free on the JEDEC official website.
LPDDR5/5X memory chips can support two sets of timing parameters at the same time: one for full-speed operation and another for lower-speed operation modes targeting reduced power consumption. This design helps extend the battery life of mobile devices, and mobile terminals are typical application scenarios for LPDDR5/5X chips and modules. At the same time, as the adoption rate of LPDDR5/5X increases in the data center field, this capability will also be utilized by more servers and high-performance computing systems.
This updated JESD406-5 standard focuses on recording the key parameters used to calculate the switching time when switching between high-speed mode and low-power mode, making this feature easier to implement at the system level, achieving more efficient power management and improving overall system performance. By clarifying these parameters in the SPD, the motherboard and controller can more accurately grasp the recovery time window during the mode switching process, thereby more actively balancing performance and power consumption while ensuring stability.
Bill Gervasi, chairman of the JEDEC SPD working group, said that with the accelerated development of artificial intelligence and other high-load applications, it has become increasingly urgent to reduce the energy consumption of computing systems. He pointed out that this update to the JESD406-5 standard is an important driving force to help the system achieve performance optimization while maintaining low power consumption.