Abstract:
Hardware whistleblower Gotou_3rd revealed that AMD's next-generation Siren Halo APU for the high-end market may be equipped with both independent GDDR7 video memory and LPDDR system memory, and no longer completely relies on unified memory. LPDDR is said to remain, but there is no definite information about the capacity, bit width and connection method of the two sets of memory pools.
It is currently unclear whether the GPU can efficiently access LPDDR. If Siren Halo uses independent GDDR7, the GPU is expected to obtain higher memory bandwidth, thereby improving game performance; however, if the efficiency of the GPU calling LPDDR is limited, resource scheduling for local AI workloads may become more complicated.
For reference, the existing Ryzen AI Max+ 495 (Gorgon Halo) supports up to 192GB of unified memory, of which up to 160GB can be configured as graphics memory. This type of large-capacity configuration is suitable for running large language models locally where memory capacity is more important, but the price of related equipment is about US$7,000.
Lucebox has adopted a mixed configuration of LPDDR and GDDR and can dynamically allocate resources, but this case does not prove that AMD will choose the same solution for Siren Halo. In terms of software, a Linux driver patch submitted by AMD in September 2026 has added GDDR7 to the memory types recognized by the GPU driver. This indicates that relevant support is being paved, but it is not enough to confirm the final specifications of Siren Halo.
In terms of product roadmap, it was revealed that Siren Halo will succeed Medusa Halo, while Siren Point is essentially a refreshed version of Medusa. Previous rumors have linked Medusa Halo with Zen 6 CPU cores, RDNA 5 graphics architecture, and LPDDR6 memory.
Gotou_3rd also mentioned that Siren Halo may be related to the Magnus chip that has been linked to the next generation Xbox, but emphasized that he had no confirmation of the information. Microsoft has confirmed that the Project Helix host will use a custom AMD SoC, but its memory configuration has not yet been announced.
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